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New technology of integrated system PCB board design


most of the current electronic design is integrated system level design, and the whole project includes both hardware design and software development. This technical feature poses new challenges to electronic engineers. First, how to divide the software and hardware functions of the system reasonably in the early stage of design and form an effective functional structure framework to avoid redundant cyclic process; Secondly, how to design high-performance and reliable PCB in a short time. Because the development of software largely depends on the realization of hardware, only by ensuring that the design of the whole machine passes at one time can the design cycle be shortened more effectively. This paper discusses the new characteristics and Strategies of system board level design under the new technical background

as we all know, the development of electronic technology is changing with each passing day, and the main reason for this change is the progress of chip technology. Semiconductor technology is becoming increasingly physical limit, and has reached the level of deep submicron. Ultra large scale circuits have become the mainstream of chip development. This change in technology and scale has brought many new electronic design bottlenecks throughout the entire electronic industry. Board level design has also been greatly impacted. The most obvious change is the great variety of chip packaging, such as the emergence of BGA, TQFP, PLCC and other packaging types; Secondly, high-density pin packaging and miniaturization packaging have become a fashion, in order to realize the miniaturization of the whole machine products, such as the wide application of MCM technology. In addition, the increase of the working frequency of the chip makes it possible to improve the working frequency of the system

these changes will inevitably bring many problems and challenges to board level design. First of all, due to the physical limit of high-density pins and pin sizes, resulting in low throughput; Secondly, the timing and signal integrity problems caused by the increase of the system clock frequency; Third, engineers hope to use better tools to complete complex high-performance design on PC platform. Therefore, it is not difficult to see that PCB design has the following three trends:

the design of high-speed digital circuits (i.e. high clock frequency and fast edge) has become the mainstream

product miniaturization and high performance must face the problem of distribution effect caused by mixed signal design technology (i.e. digital, analog and RF mixed design) on the same board

the improvement of design difficulty leads to the traditional design process and design methods, and the CAD tools on PC are difficult to meet the current technical challenges. Therefore, the transfer of EDA software tool platform from UNIX to NT platform has become a recognized trend in the industry

PCB board solution for high-speed digital system

generally, when the interconnection delay of the signal is greater than 20% of the time of the edge signal turnover threshold, the signal wire on the board will show the transmission line effect, that is, the connection is no longer a simple wire performance that shows the lumped parameters, but a distributed parameter effect. This design is called high-speed design

in the design of high-speed digital systems, designers must solve the problems of error reversal and signal distortion caused by the parameters of science and technology innovation students who are leading the industry - the problems of real-time sequence and signal integrity. At present, this is also the bottleneck problem that high-speed circuit designers must solve

traditional physical rule driven

we can find that in the traditional high-speed circuit design, electrical rule setting and physical rule setting are separated. This brings the following defects:

in the early stage of design, engineers have to spend a lot of energy on detailed front and back-end (i.e., logical establishment physical implementation) analysis to plan out the physical wiring strategy to meet the electrical needs

high speed effect is a complex subject. Hips and PPO alloys cannot achieve the desired effect simply by controlling the wiring length and parallel lines

the designer will inevitably face such a dilemma. The physical rules with false components are not applicable in the actual wiring. He has to revise the rules repeatedly to make them practical

after the wiring is completed, the post verification tool can be used for analysis. However, if problems are found, engineers must return to the design and adjust the structure or rules. This is a cyclic redundant process. It will inevitably affect the product launch time

when there are only a few or dozens of key lines in the design, physical rule driving can complete the design task well; However, when there are hundreds or even thousands of wires in the design, the physical rule driven method is simply not competent for the design task

the development of electronic technology calls for the emergence of new methods and tools to solve the bottleneck problem faced by design. In order to solve the defect of high-speed design driven by physical rules, people of insight engaged in the research and development of EDA tools for high-speed digital circuit design in the industry put forward the idea of real-time electrical rules driven physical layout and wiring three years ago, and reformed the high-speed digital design process from the design idea

new electrical rule driving: interconnection synthesis

interconnection synthesis is a typical term of real-time electrical rule driving method, that is, in the process of physical layout and wiring, the interconnection synthesizer analyzes in real time according to the constraints of electrical rules, extracts the wiring strategy that meets the requirements of the designer, and makes the design pass successfully at one time. This method accurately integrates electrical requirements and physical realization through interconnection synthesis, and fundamentally eliminates the defects of physical rule driven methods

the interconnection synthesis process is as follows:

enter the noise constraint and time sequence constraint rules in the tool

timing control layout to meet the requirements of timing constraints

perform signal integrity pre optimization

board level synthesis to ensure that key lines meet electrical requirements

complete the wiring of ordinary wires

comprehensive optimization of cabling

the electrical rule driven method can effectively evaluate the quality before designing the layout and wiring, detect the signal distortion, and determine the matching line topology and the appropriate terminal matching structure and resistance value. After completing the layout and wiring, post verification can be carried out, and the waveform can be visually detected with a software oscilloscope. The timing and distortion problems found at this time can be solved by the comprehensive optimization function of cabling

Golden tool combination and design process

now many EDA manufacturers can provide EDA tools for PCB design of high-speed systems to help users effectively improve design quality and shorten design cycle in this field. Among the board level tools of EDA system using electrical rule driven method, the most representative is the ICX software package of mentor graphics in the United States. It was the first to put forward the concept of interconnection integration, and it is also the most mature tool portfolio in the industry at present. The software package has the characteristics of plug and play, which is popular in the industry at present. It can be integrated into the classic EDA design process of PCB of many manufacturers

mixed signal design solutions

due to the miniaturization of design, consumers need high-performance and low-cost goods. In order to adapt to market competition, manufacturers require R & D personnel to develop high-performance and low-cost products with different types and different functional configurations in the shortest possible time to occupy the market. This brings many new design challenges to designers. For example, digital analog hybrid technology and even RF technology are used on the same substrate to achieve the purpose of miniaturization of design and improvement of product functions. The most typical example is the one that swept the world

the industry also has corresponding solutions - design teams, concurrent design, derivation and design reuse are the most typical strategies

(1) traditional serial design

that is, after the electronic engineer completes all the front-end circuit design, it is transferred to the physical board level designer to complete the back-end implementation. The design cycle is the sum of circuit design and board level design time

(2) novel parallel design

after miniaturization became the mainstream idea of design and hybrid technology was widely adopted, the serial design method was a little out of date. We must innovate in design methods and use powerful EDA tools to assist designers in design, so as to meet the requirements of timely listing. As we all know, it is impossible for each of us to become an expert in all fields, and it is impossible to complete all the work best and fastest in a short time. The concept of design team was put forward in this context and has been widely used. At present, many companies adopt the method of design team to cooperate in product development

that is, according to the complexity of the design and the different functional modules, the whole design is divided into different functional block blocks. Different devices are mainly used for the industrial bacterial impurity package severity meter. Developers design logic circuits and PCB boards in parallel; Then at the top level of the design, the final design results of each block block are transferred in the form of "devices" to synthesize a whole board design. This method is called PCB design reuse

through this method, it is not difficult to see that it can greatly shorten the design cycle, and the design time is only the sum of the design time of the block block that takes the most time and the connection processing time of the back-end interface

tool standardization and third-party tool integration

at present, many manufacturers are engaged in the development of electronic design automation (EDA) tools, such as cadence, synopsis, mentor graphics as the main EDA tool suppliers; In addition, there are many other EDA manufacturers. EDA covers a wide range of fields, including networks, communications, computers, aerospace and so on. The products involve system board design, system digital/intermediate frequency analog/digital analog hybrid/RF simulation design, system ic/asic/fpga design/simulation/verification, software and hardware collaborative design, etc. It is difficult for any EDA supplier to provide the strongest design process to meet the different design needs of various users. From the perspective of market share, cadence's strong products are IC board design and service, synopsis' strong products are logic synthesis, mentor graphics' strong products are PCB design and deep submicron IC design verification and testing, etc

there is no doubt that modern electronic design increasingly relies on EDA tools and technologies, and EDA manufacturers adopt the method of product standardization to meet the needs of users. Many designers adopt the strong products of multiple companies in their design process to form the best design process

EDA manufacturers have improved the compatibility of their strong products and the ability to integrate third-party products to meet the potential needs of users

(3) derivative technology

in order to meet the needs of users at different levels, manufacturers with civil products mainly need to develop products with different functions and grades to occupy the market. In the past, we often used different design processes to develop products with different functions, that is, we used different design data to produce boards with different functions to realize products. The disadvantage is that the cost is increased and the design cycle is prolonged, while increasing the artificial unreliability of the product

now many manufacturers use derivation technology to solve the above problems, that is, using the same design process data to derive products of different functional series, so as to achieve the purpose of reducing costs and improving quality

in order to meet the needs of users, many EDA manufacturers have added derivative rule checking (DRC) functions to their products, such as mentor graphics' Board Station, zuken redac, etc. taking board station as an example, it provides a complete, from the allocation of derivative function modules of front-end circuit design to the physical layout rule checking of back-end, and the generation of different derivatives

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